皮爾斯震盪器（Pierce oscillator，或稱皮爾斯晶體震盪器）是一種電子振盪電路，特別適用於配合石英振盪晶體以產生振盪訊號。
工作原理
偏壓電阻
回授電阻 R1 可以看成是反相器的偏壓電阻，令反相器工作在線性區域而成為高增益的反相放大器，並確保振盪的發生。
不妨這樣看: 假設此反相器為理想反相器，輸入阻抗無限大、輸出阻抗為0，則此電阻將令輸入電壓與輸出電壓相等，因而使反相器內的電晶體不會工作在完全導通或完全截止的狀態，而是工作在具有增益的中間過渡區域。
共振器
石英晶體與 C1, C2 兩電容構成π型網路形式的帶通濾波器，約在石英晶體的共振頻率上，提供 180 度相移與所需的電壓增益。
在發生震盪的頻率上，石英晶體呈現電感性，可視為是具有高 Q 值的電感。π型網路的 180 度相移加上反相器的負增益，合起來成為正的環增益(正回授)，使 R1 所設定的偏壓無法穩定而導致震盪。
隔離電阻
有時會在反相器的輸出與石英晶體與電容的π型網路間，額外串入一個電阻，把輸出與π形網路隔離開來。此電阻會與 C2 造成些許額外的相移。[3]
加入這個電阻的主要目的有:
- 抑制高頻混附(spurious)振盪，以獲得乾淨的輸出訊號。
- 降低石英晶體的驅動功率，以防止超過石英晶體的容許驅動功率（術語稱驅動準位，drive level）而加速老化或造成破損，尤其是對低功率的石英晶體。
負載電容
由石英晶體看出去，電路上的總電容量稱為石英晶體的「負載電容」。由於負載電容量對電路所振盪出的訊號頻率有些影響，因此，石英晶體的規格中會寫明負載電容的數值，規格書中的振盪頻率，是以符合此負載電容值的電路為準。
因此，為達到正確的振盪頻率，電路設計者應確保電路上的負載電容符合石英晶體的負載電容規格。在計算負載電容時，電路的雜散電容，例如電路板銅箔間的電容，IC 接腳的電容等，均需納入考慮。
轉載於：維基百科
| 01. |
No signal output from the crystal |
|
|
|
1-1.
Please measure the signal output by
two terminals of the crystal using Oscilloscope or Frequency Counter. If
there is no signal output, please follow step 1-1 to step 1-4 to
execute the examination. If there is signal output from out- terminal of
the crystal ( Xout), but no signal output from the in-terminal (Xin),
please check the crystal following step1-5 to step 1-6.
1-2.
Please uninstall the crystal and test
its frequency and load capacitance to see whether they vibrate and meet
your specifications using a professional testing machine. You can also
send it to your supplier to have them test it for you.
1-3.
If any of the following situations
happen, the crystal doesn’t vibrate, its load capacitance doesn’t match
your specification, or there is a huge gap between current frequency and
your targeted frequency, please send the crystal to your supplier to
conduct Quality Analysis. If the frequency and load capacitance meet
your specifications, we will need to conduct Equivalent Circuit Test.
1-4.
Equivalent Circuit Test
|
|
|
|
 |
|
|
|
1-4-1.
Generally, the oscillation circuit of
Microprocessor derives from Colpitts circuit showing below:
Picture 1
Cd and Cg are external load
capacitances, which have been built in the chip set. (Please refer to
the Specifications of the chip set)
Rf is the feedback resistance with200KΩ~1MΩ. It’s built in the chip set generally.
Rd is the Limit Resistor with
470Ω~1KΩ. This resistance is not necessary for common circuit but only
for circuits having high power supply.
1-4-2.
A stable oscillation circuit requires a
negative resistance and its value should be at least five times of the
crystal resistance. It can be written as |-R| > 5
Rr.
For example, to acquire a stable
oscillation circuit, the value of negative resistance of the IC must be
under –200Ω when the value of the crystal resistance is 40Ω.
1-4-3.
“Negative resistance” is the yardstick
to evaluate the quality of an oscillation circuit. Under some
circumstances such as aging, thermal change, voltage change, and etc.,
the circuit might not oscillate if the value of “ Q” is low. Thus, it’s
very important to measure the negative resistance (-R )following the
instructions below:
|
|
|
|
 |
|
(1)
Connect the resistance (R) with the crystal in series
(2) Adjust the value of R from the start point to the stop point of the oscillation.
(3) Measure the value of R during oscillating.
(4) You will be able to obtain the value of negative resistance, |–R| = R +
Rr, and Rr = crystal resistance.
P.S. the stray capacitance of the connected circuit might affect measured values.
1-4-4.
If the parameters of the crystal are
normal but it’s not working steadily within the oscillation circuit, we
will have to find out whether the resistance value of the IC is too low
to drive the circuit. If that’s the case, we have three methods to
improve such situation:
|
|
|
|
 |
Lower the value of external capacitance(Cd and Cg), and adopt other crystal with lower load capacitance (CL).
|
|
|
| |
Adopt a crystal with lower resistance
(Rr).
|
|
|
| |
Use
the design of unequal values of Cd and Cg. We can increase the load
capacitance of Cd
(Xout) and decrease the load
capacitance of
Cg(Xin) to raise the output of
waveform amplitude from Xin which will be used in its back-end
circuit.
|
|
|
|
|
1-5.
When there is signal output from Xout
but not
Xin, it represents the case that the
power consumption of the
rear - electrode Backend Circuit is
extremely huge. We can add a buffer between the output of the circuit
and its rear electrode to drive the back-end Circuit.
1-6.
Except the method of 1-5 mentioned
above, you can also follow the three methods in step 1-4-4. Please
contact the field application
engineers of crystal or IC manufacturers for further assistance, if your
problem can’t be solved.
|
|
|
txc還有很多關於不起震的解決說明，記得還可以去看。
轉載於：TXC http://www.txc.com.tw/tw/d_support/02.html
1：如何選擇晶體？
對於一個高可靠性的系統設計，晶體的選擇非常重要，尤其設計帶有睡眠喚醒(往往用低電壓以求低功耗)的系統。這是因為低供電電壓使提供
給晶體的激勵功率減少，造成晶體起振很慢或根本就不能起振。這一現像在上電複位時並不特別明顯，原因時上電時電路有足夠的擾動，很容易建立振盪。在睡眠喚
醒時，電路的擾動要比上電時小得多，起振變得很不容易。在振盪迴路中，晶體既不能過激勵(容易振到高次諧波上)也不能欠激勵(不容易起振)。晶體的選擇至
少必須考慮：諧振頻點，負載電容，激勵功率，溫度特性，長期穩定性。
2：如何判斷晶振是否被過分驅動？
電阻RS常用來防止晶振被過分驅動。過分驅動晶振會漸漸損耗減少晶振的接觸電鍍，這將引起頻率的上升。可用一台示波器檢
測OSC輸出腳，如果檢測一非常清晰的正弦波，且正弦波的上限值和下限值都符合時鐘輸入需要，則晶振未被過分驅動；相反，如果正弦波形的波峰，波谷兩端被
削平，而使波形成為方形，則晶振被過分驅動。這時就需要用電阻RS來防止晶振被過分驅動。判斷電阻RS值大小的最簡單的方法就是串聯一個5k或10k的微
調電阻，從0開始慢慢調高，一直到正弦波不再被削平為止。通過此辦法就可以找到最接近的電阻RS值。
3：如何選擇電容C1，C2？
（1）：因為每一種晶振都有各自的特性，所以最好按製造廠商所提供的數值選擇外部元器件。
（2）：在許可範圍內，C1,C2值越低越好。
C值偏大雖有利於振盪器的穩定，但將會增加起振時間。
（3）：應使C2值大於C1值，這樣可使上電時，加快晶振起振。
留言列表
軟體 (4)